Title :
MIPA4k: A 64×64 cell mixed-mode image processor array
Author :
Poikonen, Jonne ; Laiho, Mika ; Paasio, Ari
Author_Institution :
Dept. of Inf. Technol., Univ. of Turku, Turku, Finland
Abstract :
This paper presents the MIPA4k, a 64times64 cell mixed-mode image processor array chip. The processor cell includes an image sensor, A/D/A conversion, embedded digital and analog memories and hardware-optimized grayscale and binary processing cores. This paper presents the architecture of the processor cell and the different functional hardware. The processor has been manufactured in a 0.13 micron CMOS technology and the chip size is 5.1times4.5 mm2 with a cell area of 72times61 mum2.
Keywords :
CMOS image sensors; analogue storage; analogue-digital conversion; digital-analogue conversion; embedded systems; image processing; microprocessor chips; mixed analogue-digital integrated circuits; parallel architectures; A/D/A conversion; CMOS technology; MIPA4k; analog memory; binary processing core; different functional hardware; embedded digital memory; hardware-optimized grayscale core; image sensor; mixed-mode image processor array chip; processor architecture; size 0.13 micron; CMOS technology; Cellular neural networks; Circuits; Computer architecture; Gray-scale; Hardware; Image converters; Image sensors; Manufacturing processes; Robustness;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5118161
