DocumentCode :
2260189
Title :
Statistical SRAM analysis for yield enhancement
Author :
Zuber, Paul ; Miranda, Miguel ; Dobrovolný, Petr ; Van der Zanden, Koen ; Jung, Jong-Hoon
Author_Institution :
Digital Components, IMEC-Belgium, Belgium
fYear :
2010
fDate :
8-12 March 2010
Firstpage :
57
Lastpage :
62
Abstract :
This paper presents an automated technique to perform SRAM wide statistical analysis in presence of process variability. The technique is implemented in a prototype tool and is demonstrated on several 45 and 32nm industry-grade SRAM vehicles. Selected case studies show how this approach successfully captures non-trivial statistical interactions between the cells and the periphery, which remain uncovered when only using statistical electrical simulations of the critical path or applying a digital corner approach. The presented tool provides the designer with valuable information on what performance metrics to expect, if manufactured. Since this feedback takes place in the design phase, a significant reduction in development time and cost can be achieved.
Keywords :
SRAM chips; integrated circuit design; integrated circuit modelling; integrated circuit yield; statistical analysis; digital corner approach; process variability; size 32 nm; size 45 nm; statistical SRAM analysis; statistical electrical simulation; yield enhancement; Analytical models; Circuit simulation; Monte Carlo methods; Performance analysis; Prototypes; Random access memory; Silicon; Statistical analysis; Testing; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2010
Conference_Location :
Dresden
ISSN :
1530-1591
Print_ISBN :
978-1-4244-7054-9
Type :
conf
DOI :
10.1109/DATE.2010.5457235
Filename :
5457235
Link To Document :
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