Real time QFHD motion estimation architecture for DMPDS algorithm

This paper presents an efficient hardware architecture for motion estimation (ME) process in high resolution digital videos. This architecture uses the new Dynamic Multi-Point Diamond Search algorithm (DMPDS) which is a fast algorithm that increases the ME quality when compared with other fast algorithms for high resolution videos processing. The DMPDS achieves a better digital video quality reducing local minima falls especially in high definition videos. The designed architecture is focused on high performance, targeting real time processing at 30 frames per second (fps) in QFHD (Quad Full High Definition) resolution. The architecture was described in VHDL and synthesized to Stratix 4 Altera FPGA. The synthesis results show that the architecture is able to process QFHD videos at 34 fps.