Optimized 16×16 discrete cosine transform architecture for homogeneity-based H.264/AVC intra mode decision

To have a better coding performance, H.264/AVC encoder should choose the best block size in terms of bit rate and distortion. This work presents an optimized hardware architecture for the H.264/AVC 16×16 DCT. This architecture calculates the 24 coefficients utilized in a related work for homogeneity-based H.264/AVC intra mode decision. It was specified in VHDL and synthesized to a Xilinx Virtex2-Pro FPGA. Synthesis results indicate that the proposed solution is capable to reach high processing rates, permitting to use it in a hardware architecture for fast mode decision.