Efficient hardware implementation of the hyperbolic tangent sigmoid function

Efficient implementation of the activation function is important in the hardware design of artificial neural networks. Sigmoid, and hyperbolic tangent sigmoid functions are the most widely used activation functions for this purpose. In this paper, we present a simple and efficient architecture for digital hardware implementation of the hyperbolic tangent sigmoid function. The proposed method employs a piecewise linear approximation as a foundation, and further improves the results using a lookup table. Our design proves to be more efficient considering area times delay as a performance metric when compared to similar proposals. VLSI implementation of the proposed design using a 0.18 mum CMOS process is also presented, which shows a 35% improvement over similar recently published architectures.