DocumentCode
2261209
Title
A time domain built-in self-test methodology for SNDR and ENOB tests of analog-to-digital converters
Author
Ting, Hsin-Wen ; Liu, Bin-Da ; Chang, Soon-Jyh
Author_Institution
Dept. of Electr. Eng., National Cheng Kung Univ., Tainan, Taiwan
fYear
2004
fDate
15-17 Nov. 2004
Firstpage
52
Lastpage
57
Abstract
In this paper, a built-in self-test (BIST) methodology used to test the important transmission parameters, signal-to-noise-and-distortion (SNDR) and effective number of bits (ENOB), of analog-to-digital converters (ADCs) is proposed. A sigma-delta modulation based signal generator is presented which can concurrently produce high frequency analog sinusoidal test stimuli and digital sinusoidal reference signals on chip. Unlike conventional test methods which compute these parameters based on the spectrum information after fast Fourier transformation (FFT), the presented BIST scheme can directly determine the noise-and-distortion power density and SNDR in time domain. It can reduce the high cost of implementing FFT and windowing functional blocks, and alleviate the difficulty in setting the test frequencies and measurement conditions.
Keywords
analogue-digital conversion; built-in self test; sigma-delta modulation; time-domain analysis; time-domain synthesis; ENOB testing; SNDR testing; analog-to-digital converters; digital sinusoidal reference signals; effective number of bits; high frequency analog sinusoidal test stimuli; noise-and-distortion power density; sigma-delta modulation; signal generator; signal-to-noise-and-distortion; time domain built-in self-test; transmission parameters; Analog-digital conversion; Automatic testing; Built-in self-test; Circuit testing; Cost function; Delta-sigma modulation; Frequency; Histograms; Semiconductor device measurement; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2004. 13th Asian
ISSN
1081-7735
Print_ISBN
0-7695-2235-1
Type
conf
DOI
10.1109/ATS.2004.18
Filename
1376535
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