DocumentCode
2261272
Title
A new BIST scheme based on a summing-into-timing-signal principle with self calibration for the DAC
Author
Chen, Guan-Xun ; Lee, Chung-Len ; Chen, Jwu-E
Author_Institution
Dept. of Electron. Eng., Nat. ChiaoTung Univ., Hsin Chu, Taiwan
fYear
2004
fDate
15-17 Nov. 2004
Firstpage
58
Lastpage
61
Abstract
In this paper, we propose a BIST scheme for the digital-to-analog converter (DAC). For the scheme, an analog summer is employed and the tested signal is transformed into a timing signal for a more precise measurement. Also, a calibration circuit is added to calibrate analog imperfection to increase accuracy of the BIST circuit. An 8-bit DAC BIST circuit is designed for demonstration.
Keywords
built-in self test; calibration; circuit testing; digital-analogue conversion; summing circuits; timing circuits; BIST circuit; analog imperfection; analog summer; calibration circuit; digital-to-analog converter; self calibration; summing-into-timing-signal principle; timing signal; Adders; Built-in self-test; Calibration; Charge pumps; Circuit testing; Digital-analog conversion; Linear systems; Timing; Trigger circuits; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2004. 13th Asian
ISSN
1081-7735
Print_ISBN
0-7695-2235-1
Type
conf
DOI
10.1109/ATS.2004.10
Filename
1376536
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