A switched capacitor implementation of the generalized linear integrate-and-fire neuron

Author

Folowosele, Fopefolu ; Harrison, Andre ; Cassidy, Andrew ; Andreou, Andreas G. ; Etienne-Cummings, Ralph ; Mihalas, Stefan ; Niebur, Ernst ; Hamilton, Tara Julia

Author_Institution

Electr. & Comput. Eng. Dept., Johns Hopkins Univ., Baltimore, MD, USA

fYear

2009

fDate

24-27 May 2009

Firstpage

2149

Lastpage

2152

Abstract

In this paper we present the circuits and simulation results for a silicon neuron which is based on a modified version of the Mihalas-Niebur neural model. This silicon neuron produces 15 of the 20 known neural spiking and bursting behaviors. It has low complexity and reliable matching and can thus be easily integrated into more complex neuromorphic systems. Implemented in a 0.15 mum 1.5 V CMOS process, each neuron consumes about 7.5 nW of power at 1 kHz and occupies an area of 70 mum by 70 mum.

Keywords

CMOS integrated circuits; capacitor switching; circuit simulation; elemental semiconductors; neural nets; silicon; CMOS process; Mihalas-Niebur neural model; Si; frequency 1 kHz; neural network; neural spiking; neuromorphic systems; power 7.5 mW; size 0.15 mum; switched capacitor; voltage 1.5 V; CMOS process; Capacitors; Circuit simulation; Integrated circuit reliability; Neuromorphics; Neurons; Power system modeling; Power system reliability; Semiconductor device modeling; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5118221

Filename

5118221