DocumentCode
2261771
Title
FPGA transceiver for space environment
Author
Jezierski, Cezary ; Modelski, Józef
Author_Institution
Inst. of Radioelectron., Warsaw Univ. of Technol., Warsaw, Poland
fYear
2011
fDate
13-15 Sept. 2011
Firstpage
1
Lastpage
4
Abstract
FPGA structures have the advantage over analog solutions in weight, dimensions and power consumption. Four elements of digital transceiver were implemented in FPGA: scrambler, Reed-Solomon coder, RS decoder and FIR filter. They were simulated in Quartus, Simulink and Modelsim environments. Finally the blocks were linked together into one fully digital transmitter and receiver. The modulator and demodulator were designed with IPcores from Altera. The whole design was implemented and tested on Altera Stratix-II DSP Development Board.
Keywords
FIR filters; Reed-Solomon codes; field programmable gate arrays; satellite communication; transceivers; Altera Stratix-II DSP development board; FIR filter; FPGA transceiver; IPcores; Modelsim environment; Quartus; RS decoder; Reed-Solomon coder; Simulink; demodulator; digital receiver; digital transceiver; digital transmitter; power consumption; satellite communication; scrambler; space environment; Decoding; Field programmable gate arrays; Finite impulse response filter; Radio transmitters; Receivers; Reed-Solomon codes; Transceivers; Altera Stratix; FIR filter; FPGA; Reed-Solomon codec; satellite communications; transceiver;
fLanguage
English
Publisher
ieee
Conference_Titel
AFRICON, 2011
Conference_Location
Livingstone
ISSN
2153-0025
Print_ISBN
978-1-61284-992-8
Type
conf
DOI
10.1109/AFRCON.2011.6072187
Filename
6072187
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