DocumentCode :
2261849
Title :
Digital Compensated Methodology of a 2-1-1 cascaded continuous time delta-sigma modulator
Author :
Chen, Po-Sheng ; Chen, Hsin-Liang ; Chiang, Jen-Shiun
Author_Institution :
Dept. of Electr. Eng., Tamkang Univ., Tamsui, Taiwan
fYear :
2009
fDate :
24-27 May 2009
Firstpage :
2245
Lastpage :
2248
Abstract :
Conventionally a continuous time (CT) cascaded delta-sigma modulator is designed by virtue of the transforming from its equivalent discrete time (DT) cascaded delta-sigma modulator with compensation paths in the analog part. This work presents a new approach that does not need analog compensation paths when implementing a high order cascaded CT delta-sigma modulator. We move the compensation paths to the digital cancellation filters, and it leads to a more efficient architecture in terms of circuitry complexity, power consumption, area cost, and the robustness of circuit non-ideality. A 2-1-1 CT cascaded delta-sigma modulator for audio band application was designed and simulated; the dynamic range is 83.7 dB. The simulation results indicate that the performance of this delta-sigma modulator is competitive to the conventional approach with less hardware complexity and power dissipation.
Keywords :
delta-sigma modulation; audio band application; cascaded continuous time delta-sigma modulator; circuitry complexity; compensation path; digital cancellation filters; digital compensated methodology; equivalent discrete time; hardware complexity; power consumption; power dissipation; Circuit simulation; Costs; Delta modulation; Digital filters; Digital modulation; Dynamic range; Energy consumption; Hardware; Power dissipation; Robustness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
Type :
conf
DOI :
10.1109/ISCAS.2009.5118245
Filename :
5118245
Link To Document :
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