Title :
A bandpass continuous-time ΣΔ modulator using a parallel-DAC to reduce jitter sensitivity
Author :
Adachi, Fumiyuki ; Machida, Kazuya ; Waho, Takao
Author_Institution :
Dept. of Electr. & Electron. Eng., Sophia Univ., Tokyo, Japan
Abstract :
A simple technique to reduce jitter sensitivity in the bandpass continuous-time delta-sigma modulator is presented. The feedback path in the modulator consists of parallel-connected unit-DACs that are driven by clocks with independent jitters. The outputs of the DACs are summed to form the feedback signal, so that the jitter effects are averaged out. Behavioral simulation shows that the signal-to-noise ratio (SNR) of the proposed modulator is improved by around 10 dB by using 10 unit-DACs. It is also shown that the SNR is not sensitive to the mismatch in the unit-DAC output levels.
Keywords :
circuit feedback; jitter; sigma-delta modulation; bandpass continuous-time SigmaDelta modulator; bandpass continuous-time delta-sigma modulator; feedback path; jitter effects; jitter sensitivity; parallel-DAC; parallel-connected unit-DAC; Circuits; Clocks; Delay; Delta modulation; Jitter; Output feedback; Pulse modulation; Sampling methods; Signal to noise ratio; Space vector pulse width modulation;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5118249
