DocumentCode :
2262061
Title :
Shielding methodologies in the presence of power/ground noise
Author :
Köse, Selçuk ; Salman, Emre ; Friedman, Eby G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Rochester, Rochester, NY, USA
fYear :
2009
fDate :
24-27 May 2009
Firstpage :
2277
Lastpage :
2280
Abstract :
Design guidelines for shielding in the presence of power/ground (P/G) noise are presented in this paper. The effect of noise in the P/G network is analyzed for various line lengths, line widths, and interconnect driver resistances. A 2pi RLC model is used to investigate the effect of both coupling capacitance and mutual inductance on the crosstalk noise. For a range of shield lengths and widths, a shield line can degrade signal integrity by increasing the crosstalk noise on the victim line. Different physical spacing and shield insertion methods are compared for various parameters in terms of the coupling noise on the victim line for a 65 nm technology node.
Keywords :
crosstalk; coupling capacitance; coupling noise; crosstalk noise; driver resistances; mutual inductance; power/ground noise; shield insertion method; shielding methodology; signal integrity; size 65 nm; Circuit noise; Coupling circuits; Crosstalk; Integrated circuit interconnections; Integrated circuit noise; Integrated circuit technology; Semiconductor device noise; Switches; Voltage; Working environment noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
Type :
conf
DOI :
10.1109/ISCAS.2009.5118253
Filename :
5118253
Link To Document :
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