DocumentCode
2262280
Title
Evaluation for intra-word faults in word-oriented RAMs
Author
Hamdioui, Said ; Reyes, John D. ; Al-Ars, Zaid
Author_Institution
CE Lab., Delft Univ. of Technol., Netherlands
fYear
2004
fDate
2004
Firstpage
283
Lastpage
288
Abstract
This paper presents an industrial evaluation of tests for intra-word faults in word oriented memories, applied to big arrays with bit-interleaved organization as well as to small arrays with bit-adjacent organization, in order to investigate the influence of the memory organization on the intra-word faults. The test results show that the intra-word faults are also significantly important for interleaved memories, even though that the cells within a single word are not physically adjacent.
Keywords
circuit analysis computing; fault diagnosis; integrated circuit testing; logic testing; random-access storage; bit-adjacent organization; bit-interleaved organization; interleaved memories; intra-word faults; memory organization; word oriented memories; word-oriented RAMs; Bills of materials; Educational institutions; Fault detection; Laboratories; Random access memory; Read-write memory; Research and development; Semiconductor device testing; Stress;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2004. 13th Asian
Conference_Location
Kenting, Taiwan
ISSN
1081-7735
Print_ISBN
0-7695-2235-1
Type
conf
DOI
10.1109/ATS.2004.42
Filename
1376572
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