Reconfiguration for enhanced alternate test (REALTest) of analog circuits

An efficient design for test methodology to increase the test yield of analog circuits is presented. It is assumed that the analog circuits are tested using alternate tests that replace conventional specification-based testing procedures. The proposed approach is a circuit reconfiguration scheme that changes the values of one or more circuit components during application of the alternate test. The reconfiguration is designed to increase the sensitivity of the test measurement performed on the CUT to the manufacturing process variations in the components of the CUT. An algorithm REALTest for determining the optimal reconfiguration parameters and the corresponding alternate test has been presented. The validation results observed on analog circuits using the proposed approach show that the errors in the alternate test procedure can be reduced by an order of magnitude. This increased test accuracy result can improve test yield of alternate test by about 5%.