A new way of detecting reconvergent fanout branch pairs in logic circuits

Reconvergent fanout has been one of the critical issues for testing of VLSI circuits and design for testability. In this paper we present a new algorithm, which detects all sources of reconvergent fanout branch pairs by processing a normal circuit description. The algorithm identifies all the gates at which reconvergence occurs, the reconvergent sites, and lists all the reconvergent fanout branch pairs that are reconvergent at these sites. The automatic detection of such reconvergence can be used for improving the testability analysis or assist test generation of circuits containing such fanout branches.