Title :
12th IEEE International On-Line Testing Symposium
Abstract :
The following topics are dealt with: fault effects and self-checking techniques; BIST; technology robustness; reliability; innovative systems; innovative design; robustness; errors and latchup mitigation; secure circuits; fault detection; analog circuits; reliable systems; dependability analysis; and checkers and error correction.
Keywords :
boundary scan testing; built-in self test; error correction; fault tolerance; integrated circuit design; integrated circuit reliability; integrated memory circuits; radiation effects; BIST; analog circuits; circuits security; dependability analysis; error correction; fault detection; fault effects; innovative design; innovative systems; latchup mitigation; reliability; reliable systems; self-checking techniques; technology robustness;
Conference_Titel :
On-Line Testing Symposium, 2006. IOLTS 2006. 12th IEEE International
Conference_Location :
Lake Como
Print_ISBN :
0-7695-2620-9
DOI :
10.1109/IOLTS.2006.1
