Title :
Modeling and simulation for crosstalk aggravated by weak-bridge defects between on-chip interconnects
Author :
Wang, Lei ; Gupta, Sandeep K. ; Breuer, Melvin A.
Author_Institution :
Dept. of EE Syst., Southern California Univ., Los Angeles, CA, USA
Abstract :
This paper presents comprehensive analytic models that consider both the case of a weak bridge, and the combination of a weak bridge and crosstalk between two interconnects. Our models capture the induced signal delay and pulse as a function of the parameters of the circuit and input signals. Our results are compared with HSPICE and shown to be accurate. A simulator is developed that implements our models and accurately captures timing (delay) characteristics of a circuit. We contrast our results with others, and show the benefits of this new model as well as the ability to predict the range of resistance that leads to delay errors.
Keywords :
SPICE; bridge circuits; circuit analysis computing; crosstalk; delay circuits; delays; integrated circuit design; integrated circuit interconnections; timing; HSPICE; crosstalk modeling; crosstalk simulation; delay characteristics; delay errors; induced signal delay; on-chip interconnects; timing characteristics; weak-bridge defects; Bridge circuits; Capacitance; Circuit faults; Circuit testing; Coupling circuits; Crosstalk; Delay effects; Integrated circuit interconnections; Logic; Timing;
Conference_Titel :
Test Symposium, 2004. 13th Asian
Print_ISBN :
0-7695-2235-1
DOI :
10.1109/ATS.2004.58
