Title :
Two-stage large capacitive load amplifier with embedded capacitor-multiplier compensation
Author_Institution :
Beijing Microelectron. Technol. Inst., Beijing, China
Abstract :
This paper proposes a low-voltage, low-power, two-stage operational transconductance amplifier (OTA) for driving large capacitive loads. The embedded capacitor-multiplier compensation mechanism facilitates using a very small Miller capacitor which generates widely separated left-half-plane (LHP) poles without introducing a right-half-plane (RHP) zero. Besides, it provides a feedforward signal path to create a LHP zero and therefore significantly improves the stability of the OTA. Furthermore, a simple but efficient Class AB output stage is used to achieve fast setting response and avoid extra static power dissipation. The proposed OTA was designed in a standard 0.35-mum CMOS technology. Detailed simulation results demonstrate that when driving 1000 pF capacitive load, the OTA has 77-dB gain, 1.41-MHz unit-gain frequency (UGF) and 0.6-V/mus average slew rate while dissipating only 45 muW under 1.5-V supply.
Keywords :
CMOS integrated circuits; capacitors; operational amplifiers; Class AB output stage; Miller capacitor; average slew rate; capacitance 1000 pF; embedded capacitor; feedforward signal path; frequency 1.41 MHz; gain 77 dB; left-half-plane pole; multiplier compensation mechanism; operational transconductance amplifier; power 45 muW; size 0.35 mum; static power dissipation; two-stage large capacitive load amplifier; unit-gain frequency; voltage 1.5 V; CMOS technology; Capacitors; Circuits; Frequency; Microelectronics; Operational amplifiers; Poles and zeros; Power dissipation; Transconductance; Transient response;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5118304