Title :
45nm low-power embedded pseudo-SRAM with ECC-based auto-adjusted self-refresh scheme
Author :
Pyo, Suk-Soo ; Lee, Cheol-Ha ; Kim, Gyun-Hong ; Choi, Kyu-Myung ; Jun, Young-Hyun ; Kong, Bai-Sun
Author_Institution :
Sch. of Inf. & Commun. Eng., Sungkyunkwan Univ., Suwon, South Korea
Abstract :
In this paper, a low-power embedded pseudo-SRAM adopting novel auto-adjusted self-refresh control scheme has been designed. The proposed self-refresh control scheme automatically extends the self-refresh period by monitoring the number of failed cells using error correction code (ECC). The scheme can provide a substantial reduction of data-retention power consumption by choosing an optimal self-refresh period regardless of process, voltage, and temperature (PVT) variations. A 4-Mb embedded pseudo-SRAM designed in a 45-nm embedded DRAM technology providing 1.1-V 166-MHz random cycle operation achieves 57-uW data retention power consumption at room temperature.
Keywords :
DRAM chips; SRAM chips; error correction codes; low-power electronics; ECC-based auto-adjusted self-refresh scheme; autoadjusted self-refresh control scheme; data-retention power consumption; embedded DRAM technology; error correction code; frequency 166 MHz; low-power embedded pseudo-SRAM; size 45 nm; temperature 293 K to 298 K; voltage 1.1 V; Automatic control; Design engineering; Energy consumption; Error correction codes; Large scale integration; Leakage current; Random access memory; Temperature control; Temperature dependence; Temperature sensors; Embedded memory; Self-refresh; error correction code (ECC); low Power; pseudo-SRAM;
Conference_Titel :
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-3827-3
Electronic_ISBN :
978-1-4244-3828-0
DOI :
10.1109/ISCAS.2009.5118313
