Design of Low-Voltage Bandgap Reference Circuits in Multi-Gate CMOS Technologies

This paper presents design considerations and measurement results for low voltage bandgap reference circuits in a recent multi-gate CMOS technology. Gated p-i-n diodes are used as basic elements, a corresponding model covering temperature dependence is derived. The impact of non-idealities and process variations on circuit performance is analyzed, design guidelines are derived. Low g_ds of current source transistors, low op-amp offset and sufficient gain are identified as main parameters for optimization of multi-gate bandgap performance. The feasibility of low voltage bandgap references in multi-gate technology is proven by measurement results. Bandgap references with PSRR of 40 dB and TC of 56 muV/degC are shown.