A holistic methodology for network processor design

Author

Bonorden, Olaf ; Bruls, Nikolaus ; Kastens, Uwe ; Le, Dinh Khoi ; Der Heide, Friedhelm Meyer auf ; Niemann, Jorg-Christian ; Porrmann, Mario ; Ruckert, Ulrich ; Slowik, Adrian ; Thies, Michael

Author_Institution

Paderborn Univ., Munich, Germany

fYear

2003

fDate

20-24 Oct. 2003

Firstpage

583

Lastpage

592

Abstract

The GigaNetIC project aims to develop high-speed components for networking applications based on massively parallel architectures. A central part of this project is the design, evaluation, and realization of a parameterizable network processing unit. In this paper we present a design methodology for network processors which encompasses the research areas from the application software down to the gate level of the chip. Key components of this holistic approach have been successfully applied to characteristic examples of architecture refinements.

Keywords

microprocessor chips; multiprocessor interconnection networks; parallel architectures; system-on-chip; GigaNetIC project; high-speed components; network processor design; parallel architectures; Application software; Computer architecture; Computer science; Hardware; Memory management; Multiprocessor interconnection networks; Network-on-a-chip; Parallel processing; Process design; Program processors;

fLanguage

English

Publisher

ieee

Conference_Titel

Local Computer Networks, 2003. LCN '03. Proceedings. 28th Annual IEEE International Conference on

ISSN

0742-1303

Print_ISBN

0-7695-2037-5

Type

conf

DOI

10.1109/LCN.2003.1243185

Filename

1243185