DocumentCode :
2263797
Title :
Design of a high-speed overlapped round robin (ORR) arbiter
Author :
Yoghigoe, K. ; Christensen, Kenneth J. ; Roginsky, Allen
Author_Institution :
Comput. Sci. & Eng., South Florida Univ., Tampa, FL, USA
fYear :
2003
fDate :
20-24 Oct. 2003
Firstpage :
638
Lastpage :
639
Abstract :
Round robin (RR) arbitration is commonly used for scheduling of cells in high-speed packet switches. In this paper, we present an overlapped RR (ORR) arbiter design that fully overlaps RR polling and cell scheduling. The ORR arbiter achieves 100% throughput even when a cell transfer time is less than a worst case polling, or scheduling, cycle. This is done by scheduling blocks of celts during a cell transfer time.
Keywords :
packet switching; scheduling; ORR; cell scheduling; cell transfer time; overlapped round robin arbiter; packet switches; polling; Computer science; Control systems; Counting circuits; Dispatching; Packet switching; Processor scheduling; Round robin; Scheduling algorithm; Switches; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Local Computer Networks, 2003. LCN '03. Proceedings. 28th Annual IEEE International Conference on
ISSN :
0742-1303
Print_ISBN :
0-7695-2037-5
Type :
conf
DOI :
10.1109/LCN.2003.1243193
Filename :
1243193
Link To Document :
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