Title :
PCG techniques for interior point algorithms
Author :
Chin, P. ; Vannelli, A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
In many engineering applications, very large, sparse linear programs (LPs) arise. Fast interior point algorithms for solving LPs are currently gaining popularity over traditional simplex methods. The bottleneck step of the interior point method is the solution of the normal equations or of an equivalent “augmented” system at each iteration. The current work examines the effectiveness of the preconditioned conjugate gradient (PCG) method for the symmetric positive definite normal equations. In addition, we discuss the use of a PCG variant for the indefinite augmented equations. Although the methods can be applied to LPs from different application areas, we focus an problems from VLSI layout optimization
Keywords :
VLSI; circuit layout; circuit layout CAD; circuit optimisation; conjugate gradient methods; linear programming; PCG techniques; VLSI layout optimization; bottleneck step; engineering applications; equivalent augmented system; fast interior point algorithms; indefinite augmented equations; interior point algorithms; interior point method; iteration; normal equations; preconditioned conjugate gradient method; sparse linear programs; symmetric positive definite normal equations; Application software; Constraint optimization; Equations; Linear matrix inequalities; Matrix converters; Optimization methods; Routing; Sparse matrices; Vectors; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
DOI :
10.1109/MWSCAS.1993.343095