Achieved IPC performance (still the foundation for extensibility)

Author

Liedtke, Jochen ; Elphinstone, Kevin ; Schonberg, S. ; Härtig, Hermarill ; Heiser, Gernot ; Islam, Nahina ; Jaeger, Trent

Author_Institution

IBM Thomas J. Watson Res. Center, Hawthorne, NY, USA

fYear

1997

fDate

5-6 May 1997

Firstpage

28

Lastpage

31

Abstract

Extensibility can be based on cross-address-space interprocess communication (IPC) or on grafting application-specific modules into the operating system. For comparing both approaches, we need to explore the best achievable performance for both models. This paper reports the achieved performance of cross-address-space communication for the L4 microkernel on Intel Pentium, Mips R4600 and DEC Alpha processors. The direct costs range from 45 cycles (Alpha) to 121 cycles (Pentium). Since only 2.3% of the L1 cache are required (Pentium), the average indirect costs are not to be expected much higher

Keywords

cache storage; microprocessor chips; multiprocessing programs; operating system kernels; performance evaluation; software performance evaluation; subroutines; DEC Alpha; Intel Pentium; L1 cache; L4 microkernel; Mips R4600; achieved IPC performance; application-specific modules; average indirect costs; cross-address-space communication; direct costs; extensibility; interprocess communication; microprocessors; operating system; Computer languages; Computer science; Costs; Data security; Database systems; Kernel; Operating systems; Protection; Safety; Text processing;

fLanguage

English

Publisher

ieee

Conference_Titel

Operating Systems, 1997., The Sixth Workshop on Hot Topics in

Conference_Location

Cape Cod, MA

Print_ISBN

0-8186-7834-8

Type

conf

DOI

10.1109/HOTOS.1997.595177

Filename

595177