DocumentCode
2264901
Title
Ultra-thin chip fabrication for next-generation silicon processes
Author
Burghartz, Joachim N. ; Harendt, Christine ; Hoang, Tu ; Kiss, Astrid ; Zimmermann, Martin
Author_Institution
Inst. fur Mikroelektron. Stuttgart, Stuttgart, Germany
fYear
2009
fDate
12-14 Oct. 2009
Firstpage
131
Lastpage
137
Abstract
Ultra-thin chip technology is identified as an enabler for overcoming bottlenecks in microelectronics, such as 3D integration, and for leading to new applications, such as hybrid, flexible system-in-foil (SiF). This, however, calls for new techniques in fabricating very thin wafers or chips, in applying them to device integration processes and in assembly and packaging. The application to SiF requires that the ultra-thin chips feature excellent mechanical reliability and flexibility. This paper focuses on a recently introduced novel technology, called Chipfilmtrade, for fabricating ultra-thin chips. The technology consists of a pre-process Chipfilmtrade and a post-process Pick, Crack&Placetrade. Particular attention is paid to the design and characterization to the mechanical anchors that are broken in the Pick, Crack&Place process to singulate the thin chips. Also discussed is the characterization of the chip´s mechanical stability and flexibility.
Keywords
assembling; electronics packaging; integrated circuit manufacture; 3D integration; Chipfilm; assembly; device integration; flexible system-in-foil; mechanical reliability; microelectronics; next-generation silicon processes; packaging; ultra-thin chip fabrication; Assembly; Chip scale packaging; Mechanical factors; Microelectronics; Power dissipation; Silicon; Stability; Substrates; Surface cracks; Thermal factors;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, 2009. BCTM 2009. IEEE
Conference_Location
Capri
ISSN
1088-9299
Print_ISBN
978-1-4244-4894-4
Electronic_ISBN
1088-9299
Type
conf
DOI
10.1109/BIPOL.2009.5314128
Filename
5314128
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