DocumentCode :
2264916
Title :
Design and construction of an active periodic noise cancelling system using FPGAs
Author :
Hashemian, Reza ; Golla, Kumar ; Kuo, Sen M. ; Joshi, Ajit
Author_Institution :
Dept. of Electr. Eng., Northern Illinois Univ., DeKalb, IL, USA
fYear :
1993
fDate :
16-18 Aug 1993
Firstpage :
891
Abstract :
The purpose in this presentation is to design and construct a simple active periodic noise cancellation system (APNC) by using FPGAs technology. The design follows a simplified version of the waveform synthesis method, using an adaptive least mean square error technique. The simulation results show a 40 db noise reduction for the case of single frequency noise combined with its three consecutive harmonics. For the hardware implementation TI´s TPC1020A FPGAs package with 2000 equivalent gates has been adopted
Keywords :
acoustic noise; acoustic signal processing; active noise control; adaptive signal processing; application specific integrated circuits; field programmable gate arrays; least mean squares methods; programmable logic arrays; 40 dB; FPGA; TI TPC1020A; acoustic noise cancellation; active periodic noise cancelling system; adaptive least mean square error technique; consecutive harmonics; equivalent gates; hardware implementation; noise reduction; single frequency noise; waveform synthesis method; Acoustic noise; Active noise reduction; Engines; Field programmable gate arrays; Frequency; Noise cancellation; Noise generators; Noise level; Noise reduction; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
Type :
conf
DOI :
10.1109/MWSCAS.1993.343211
Filename :
343211
Link To Document :
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