Built-in self-testing based on compressed 2-dimensional signature analysis

Author

Chenxi, Cai ; Xiutan, Wang ; Yingning, Peng

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing, China

fYear

2001

fDate

2001

Firstpage

885

Lastpage

888

Abstract

The design of modern electronic systems demands high system reliability and maintainability. In order to perform fault detection, localization and isolation effectively, it is necessary to design a built-in self-testing (BIST) module specific to the corresponding system. This paper presents a BIST method based. on compressed 2-dimensional signature analysis. The principle of compression and performance of test are discussed in detail. Using the presented method, a high faulty coverage ratio (FCR) can be achieved with a short signature compressed in both time domain and space domain. Theoretical analysis shows that this method is reliable and it can be easily implemented in hardware

Keywords

built-in self test; circuit reliability; fault location; logic testing; BIST module; built-in self-testing; compressed 2-dimensional signature analysis; fault detection; faulty coverage ratio; isolation; localization; maintainability; system reliability; Built-in self-test; Circuit faults; Circuit testing; Fault detection; Hardware; Maintenance; Performance analysis; Power system reliability; Shift registers; Time domain analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Radar, 2001 CIE International Conference on, Proceedings

Conference_Location

Beijing

Print_ISBN

0-7803-7000-7

Type

conf

DOI

10.1109/ICR.2001.984853

Filename

984853