DocumentCode
2265003
Title
Power analysis of a chaos-based Random Number Generator for cryptographic security
Author
Pareschi, Fabio ; Scotti, Giuseppe ; Giancane, Luca ; Rovatti, Riccardo ; Setti, Gianluca ; Trifiletti, Alessandro
Author_Institution
ENDIF, Univ. of Ferrara, Ferrara, Italy
fYear
2009
fDate
24-27 May 2009
Firstpage
2858
Lastpage
2861
Abstract
In this paper we consider a side-channel attack on a chaos-based random number generator (RNG) based on power consumption analysis. The aim of this attack is to verify if it is possible to retrieve information regarding the internal state of the chaotic system used to generate the random bits. In fact, one of the most common arguments against this kind of RNGs is that, due to the deterministic nature of the chaotic circuit on which they rely, the system cannot be truly unpredictable. Here we analyze the power consumption profile of a chaos-based RNG prototype we designed in 0.35 mum CMOS technology, showing that for the proposed circuit the internal state (and therefore the future evolution) of the system cannot be determined with a side-channel attack based on a power analysis. This property makes the proposed RNG perfectly suitable for high-security cryptographic applications.
Keywords
CMOS integrated circuits; chaos generators; cryptography; random number generation; CMOS technology; chaos-based random number generator; chaotic circuit; cryptographic security; power consumption analysis; side-channel attack; size 0.35 mum; CMOS technology; Chaos; Circuits; Cryptography; Energy consumption; Information retrieval; Information security; Power system security; Prototypes; Random number generation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on
Conference_Location
Taipei
Print_ISBN
978-1-4244-3827-3
Electronic_ISBN
978-1-4244-3828-0
Type
conf
DOI
10.1109/ISCAS.2009.5118398
Filename
5118398
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