DocumentCode
2265123
Title
Accurate gate CD control for 130 nm CMOS technology node
Author
Nagase, Masanori ; Yokota, K. ; Tokashiki, K.
Author_Institution
Adv. Technol. Dev. Div., NEC Electron., Kanagawa, Japan
fYear
2003
fDate
30 Sept.-2 Oct. 2003
Firstpage
183
Lastpage
186
Abstract
This paper presents the methodology for the gate trim etching to obtain the accurate critical dimension (CD) control for 100 nm-gate formation. We especially focus on both the gate dummy data ratio and the dummy configuration to develop the feed-forward (FF) advanced process technology. We find the trim rate strongly depends on dummy peripheral length. The feed-forward technology to get accurate gate CD control would not be successful without the knowledge of peripheral length effect.
Keywords
CMOS integrated circuits; etching; feedforward; integrated circuit manufacture; spatial variables control; 100 nm; 130 nm; CMOS technology node; critical dimension control; feed-forward technology; gate CD control; gate formation; gate trim etching; peripheral length effect; trim rate; CMOS technology; Etching; Feedforward systems; Large scale integration; National electric code; Paper technology; Plasma measurements; Resists; Space technology; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Manufacturing, 2003 IEEE International Symposium on
ISSN
1523-553X
Print_ISBN
0-7803-7894-6
Type
conf
DOI
10.1109/ISSM.2003.1243260
Filename
1243260
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