Title :
Defect control strategies and defect-yield-correlations in consideration of defect capture rate
Author_Institution :
Philips Semicond. GmbH, Boeblingen, Germany
fDate :
30 Sept.-2 Oct. 2003
Abstract :
The influence of defect capture rate on defect line control strategies and defect-yield-correlation models is discussed. A theoretical model, describing the influence of measurement tool parameters in connection with chip design parameters, reveals that a considerable amount of defects cannot be detected generally. Practical examples support this experience. Consequences of these capture rate variations with respect to defect control concepts and defect-yield-correlations, under special consideration of product diversity within a production line, are deduced. Finally different concepts to handle these capture rate issues are roughly discussed.
Keywords :
electronic products; integrated circuit design; product design; quality control; chip design; defect capture rate; defect control; defect yield correlations; electronic products; integrated circuit design; product design; quality control; Area measurement; Chip scale packaging; Light scattering; Portfolios; Position measurement; Product design; Production; Semiconductor device measurement; Semiconductor device modeling;
Conference_Titel :
Semiconductor Manufacturing, 2003 IEEE International Symposium on
Print_ISBN :
0-7803-7894-6
DOI :
10.1109/ISSM.2003.1243273