A capacity-dependence dynamic sampling strategy

The investment required for a new semiconductor manufacturing is increasing more and more according as the device design size. Therefore, Semiconductor manufacturers have to meet both cost and cycle time objects, and increase output and reduce cost at the same time. In general concept, most of semiconductor manufacturers used the 100% inspection or fixed -rule sampling method as defect inspection plan. As we know, the cycle time was sensitive with tool utilization as serious factor. However, it´s hard to give consideration to both, due to the cycle time and quality control as trade-off factors as usual. This paper describes an innovative method of the sampling of the wafer defect surface scanning by precision instrument. For example, there are more than hundred defect inspection stages of defect inspect within 0.13um technology process flow to ensure the quality and product control thus the total queue time during IC process is quite long. It is also not easy to increase the capacity of defect scanning due to the defect detector is always cause huge cost to IC supplier (At least 3M U.S dollar per detector). To solve this problem, a fluctuant sampling method developed from tsmc proposed to increase equipment utilization and reduce cycle time at the same time. Patent filing of this new innovation of dynamic sampling methodology is progressing.