Advanced gate process critical dimension control in semiconductor manufacturing

Control on the order of nanometers is crucial for gate etch, in which the smaller the gate, the faster and more valuable the resulting chip. To date, feed-forward and closed-loop schemes have been created, using a series of standalone systems in the process flow. Lately, integrating metrology capabilities with an etch platform has been proven practicable. This paper presents a model for closed-loop control of the gate etch process and demonstrates the virtual elimination of post-etch critical dimension variation that results.