Title :
CMOS VLSI design of 32×32 ATM switch using simple logic control
Author :
Khan, Nadeem A. ; Rizkalla, Maher E.
Author_Institution :
Dept. of Electr. Eng., Purdue Univ., Indianapolis, IN, USA
Abstract :
A 32×32 asynchronous transfer mode ATM switch consisting of interconnection network using 1×32 parallel expander circuits is presented to overcome the effect of internal path blocking. The CMOS VLSI architecture and the control unit consisting of serial shift registers and latches to keep the destination path open for the length of a packet, were designed using MAGIC software and simulated by IRSIM. The system performed well under a variety of input traffic patterns. As low as 5 ns delay was estimated by the 1×32 expander circuit, while the clock generated by the combinational circuit for latching showed a delay of 190 ns
Keywords :
CMOS logic circuits; VLSI; asynchronous transfer mode; circuit CAD; circuit analysis computing; electronic switching systems; field effect transistor switches; integrated circuit design; logic CAD; 190 ns; 32×32 switch; 5 ns; ATM switch; CMOS VLSI design; IRSIM; MAGIC software; VLSI architecture; asynchronous transfer mode; combinational circuit; interconnection network; internal path blocking; latches; logic control; parallel expander circuits; serial shift registers; simulation; Asynchronous transfer mode; CMOS logic circuits; Computer architecture; Delay estimation; Logic design; Multiprocessor interconnection networks; Shift registers; Switches; Switching circuits; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on
Conference_Location :
Detroit, MI
Print_ISBN :
0-7803-1760-2
DOI :
10.1109/MWSCAS.1993.343309
