Effect of op-amp phase margin on SC ΣΔ modulator performances

Author

Pugliese, A. ; Amoroso, F.A. ; Cappuccino, G. ; Cocorullo, G.

Author_Institution

Dept. of Electron., Comput. Sci. & Syst., Univ. of Calabria, Rende, Italy

fYear

2009

fDate

24-27 May 2009

Firstpage

3134

Lastpage

3137

Abstract

The effect of operational amplifier (op-amp) phase margin on the performances of switched-capacitor (SC) sigma-delta modulators (SigmaDeltaMs) is analyzed. The investigation is carried out by performing behavioral simulations based on a second-order settling description for the SC integrator implemented by the op-amp. The analysis allows well-founded specifications for the amplifier to be defined since the preliminary behavioral simulation phase, avoiding costly system parameters tuning in the transistor-level design phase. Behavioral simulations of a typical single-bit second-order SigmaDeltaM are performed to demonstrate the usefulness of the proposed study in the definition of proper circuit parameters.

Keywords

operational amplifiers; sigma-delta modulation; switched capacitor networks; SC SigmaDelta modulator performances; op-amp phase margin; sigma-delta modulators; switched-capacitor modulators; transistor-level design phase; Analytical models; Circuit optimization; Circuit simulation; Computational modeling; Computer science; Operational amplifiers; Performance analysis; Phase modulation; Strontium; Time factors;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on

Conference_Location

Taipei

Print_ISBN

978-1-4244-3827-3

Electronic_ISBN

978-1-4244-3828-0

Type

conf

DOI

10.1109/ISCAS.2009.5118467

Filename

5118467