DocumentCode
2266463
Title
A Modified Vertex Method for Parallelization of Arbitrary Nested Loops
Author
Bielecki, W. ; Kocisz, R.
Author_Institution
Technical University of Szczecin, Poland
fYear
2004
fDate
7-10 Sept. 2004
Firstpage
91
Lastpage
96
Abstract
A technique, permitting us to linearize constraints formed to find affine schedules for arbitrary nested loops, is presented. The main advantage of this technique is that it does not require finding the polytope vertices and results in the fewer number of inequalities and equalities than that yielded with the vertex technique. Affine schedules found are valid for the arbitrary positive lower and upper loop bounds. Experiments with the Livermore loops are discussed. The restriction of the technique and tasks for future research are discussed.
Keywords
Computer science; Parallel processing; Processor scheduling; Upper bound;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on
Print_ISBN
0-7695-2080-4
Type
conf
DOI
10.1109/PCEE.2004.4
Filename
1376740
Link To Document