DocumentCode :
2266572
Title :
A New Memory Module for Memory Intensive Applications
Author :
Tanabe, Nari ; Nakajo, Hironori ; Hakozaki, Hirotaka ; Nakatake, Masasige ; Dohi, Yasunori ; Amano, Hideharu
Author_Institution :
Toshiba
fYear :
2004
fDate :
7-10 Sept. 2004
Firstpage :
123
Lastpage :
128
Abstract :
Some applications with gather / scatter operations are difficult to accelerate. These operations cause inefficient cache use in each processor and fine grain global communications in parallel systems. There are several applications with such characteristics particularly in electrical engineering. For examples, circuit simulation and power flow simulation with LU decomposition for random sparse matrix has such characteristics. This paper presents how to make inexpensive personal supercomputers to solve these problems. In order to get the merit of commercial-off-the-shelf (COTS) continuously after the death of vector supercomputer vendors, it is designed without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load / store function and communication functions make an inexpensive home-use personal computer into a node similar to Earth simulator´s one. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG is shown as an example.
Keywords :
Acceleration; Bridge circuits; Circuit simulation; Electrical engineering; Global communication; Load flow; Microcomputers; Scattering; Sparse matrices; Supercomputers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on
Print_ISBN :
0-7695-2080-4
Type :
conf
DOI :
10.1109/PCEE.2004.5
Filename :
1376744
Link To Document :
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