Analog CMOS neural networks based on Gilbert multipliers with in-circuit learning

Author

McNeill, Dean K. ; Schneider, Christian R. ; Card, Howard C.

Author_Institution

Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada

fYear

1993

fDate

16-18 Aug 1993

Firstpage

1271

Abstract

This paper examines analog CMOS circuit implementations of several common neural network algorithms. All circuits described perform in-circuit learning, using Gilbert multipliers as a primary circuit component. These include 3 μm and 1.2 μm designs for contrastive Hebbian learning, and Becker-Hinton networks (a variation of delta-rule learning). In addition, unsupervised learning circuits for competitive learning are presented

Keywords

CMOS analogue integrated circuits; Hebbian learning; analogue computer circuits; analogue multipliers; neural chips; unsupervised learning; 1.2 micron; 3 micron; Becker-Hinton networks; Gilbert multipliers; analog CMOS circuit; competitive learning; contrastive Hebbian learning; delta-rule learning; in-circuit learning; neural network algorithms; unsupervised learning; CMOS analog integrated circuits; Computational modeling; Computer architecture; Computer networks; Equations; Hebbian theory; Neural network hardware; Neural networks; Reduced instruction set computing; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on

Conference_Location

Detroit, MI

Print_ISBN

0-7803-1760-2

Type

conf

DOI

10.1109/MWSCAS.1993.343330

Filename

343330