DocumentCode
2266857
Title
Hardware/software co-design of a SIMD-DSP-based DVB-T receiver
Author
Seidel, H. ; Robelly, P. ; Fettweis, Gerhard
Author_Institution
Dresden Univ. of Technol., Germany
fYear
2004
fDate
7-10 Sept. 2004
Firstpage
215
Lastpage
225
Abstract
The demand for increasing design complexity has to face decreasing design time and design cost issues. Traditional full custom design flows are not reasonable to cope with these challenges. We have developed a design exploration platform, which provides access to main chip design parameters beginning from early design stages. With this platform, architecture and hardware/software partitioning failures are correctable with low change cost in a short time. Our designs are based on synchronous transfer architecture SIMD DSP cores with a tailored instruction set. Automatic core generation tools speed up the design and verification process. In this paper we present our design exploration platform and a use case study for a DVB-T/H like OFDM-receiver and transmitter build with our design methodology.
Keywords
OFDM modulation; circuit complexity; digital signal processing chips; digital video broadcasting; hardware description languages; hardware-software codesign; instruction sets; parallel processing; synchronisation; OFDM receiver; SIMD-DSP-based DVB-T receiver; VHDL; design complexity; digital signal processing chip; hardware-software codesign; synchronous transfer architecture; transmitter; Algorithm design and analysis; Application software; Hardware; Parallel processing; Process design; Prototypes; Signal processing algorithms; Software libraries; Software prototyping; User interfaces;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on
Print_ISBN
0-7695-2080-4
Type
conf
DOI
10.1109/PCEE.2004.7
Filename
1376759
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