Title :
Design considerations for implementing a modularly configured attached processor in a multi chip module
Author :
Singh, J. Sanjay ; Gremel, Buck W. ; Singh, Vijay P. ; Gibson, Glenn A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas Univ., El Paso, TX, USA
fDate :
31 Jan-2 Feb 1995
Abstract :
Implementation of a novel modularly configured attached processor (MCAP) architecture was evaluated using 1 μm CMOS logic on an MCM-D The transistor count was approximately ten million transistors, distributed on twenty-five chip dice. Delay, area, and power calculations were performed using the SUSPENS model. Rent´s rule was found to be not applicable. Speed was calculated to be in the 100 MHz range. The module foot print was found to be 90 cm2. Power dissipation per unit area was low enough to allow air cooling
Keywords :
CMOS logic circuits; coprocessors; multichip modules; 1 micron; 100 MHz; CMOS logic; MCM-D; Rent rule; SUSPENS model; air cooling; area; chip dice; delay; design; foot print; modularly configured attached processor; multi chip module; power dissipation; speed; transistor count; CMOS logic circuits; CMOS process; CMOS technology; Computer architecture; Cooling; Delay; Foot; Power dissipation; Power system management; Semiconductor device modeling;
Conference_Titel :
Multi-Chip Module Conference, 1995. MCMC-95, Proceedings., 1995 IEEE
Conference_Location :
Santa Cruz, CA
Print_ISBN :
0-8186-6970-5
DOI :
10.1109/MCMC.1995.512005
