DocumentCode :
2267526
Title :
A unified approach to chip, test, and assembly technologies for MCMs
Author :
Bartelink, Dirk J.
Author_Institution :
Hewlett-Packard Co., Palo Alto, CA, USA
fYear :
1995
fDate :
31 Jan-2 Feb 1995
Firstpage :
221
Lastpage :
228
Abstract :
The “post-fab” manufacturing technologies of test, assembly and packaging are taking a larger share of the final cost of complex ICs than ever before even though the cost of a wafer fab sits at unprecedented levels. These technologies have been allowed to remain static as long as they were minor cost adders, but now they need to receive the same attention in technology evolution as their better known wafer-fab rivals. The traditional approaches to packaging and test have been optimized independently of each other and of chip technology. This paper provides a re-examination of current practice and proposes a step-by-step plan toward a joint optimum for meeting the fab and post-fab constraints for high-performance microprocessor ICs. This optimum considers the fact that, particularly at high operating speeds, chips must be electrically exercised as part of their manufacture both to ensure rapid yield learning and to guarantee Known Good Die specifications
Keywords :
integrated circuit manufacture; integrated circuit testing; microassembling; multichip modules; MCMs; assembly; known good die specifications; packaging; post-fab manufacturing technologies; rapid yield learning; test; Assembly; Bonding; CMOS technology; Circuit testing; Companies; Cost function; Integrated circuit packaging; Laboratories; Manufacturing industries; Meeting planning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multi-Chip Module Conference, 1995. MCMC-95, Proceedings., 1995 IEEE
Conference_Location :
Santa Cruz, CA
Print_ISBN :
0-8186-6970-5
Type :
conf
DOI :
10.1109/MCMC.1995.512031
Filename :
512031
Link To Document :
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