Multiple-valued logic in FPGAs

Author

Zilic, Zeljko ; Vranesic, Zvonko G.

Author_Institution

Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada

fYear

1993

fDate

16-18 Aug 1993

Firstpage

1553

Abstract

This paper considers the applicability of multiple-valued logic (MVL) circuits in implementation of field-programmable gate arrays (FPGAs). It proposes an FPGA logic block architecture that features MVL current-mode CMOS circuitry. The logic block combines the lookup-table and multiplexer approaches found in commercial FPGAs, and provides additional versatility through its current-mode operation

Keywords

CMOS logic circuits; current-mode logic; field programmable gate arrays; logic design; multivalued logic; programmable logic arrays; FPGA logic block architecture; current-mode CMOS circuitry; current-mode operation; field-programmable gate arrays; lookup-table; multiple-valued logic; multiplexer; CMOS logic circuits; CMOS technology; Current mode circuits; Detectors; Field programmable gate arrays; Integrated circuit interconnections; Logic arrays; Logic circuits; Mirrors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1993., Proceedings of the 36th Midwest Symposium on

Conference_Location

Detroit, MI

Print_ISBN

0-7803-1760-2

Type

conf

DOI

10.1109/MWSCAS.1993.343412

Filename

343412

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2267896