DocumentCode
2268312
Title
A simple and effective ESD protection structure for high-voltage-tolerant I/O pad
Author
Fan, Hang ; Jiang, Lingli ; Zhang, Bo
Author_Institution
Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear
2010
fDate
28-30 July 2010
Firstpage
605
Lastpage
608
Abstract
A simple and effective ESD protection structure is proposed for the high-voltage-tolerant I/O pad. It can tolerate a voltage higher than the power supply voltage without the leakage current caused by PMOS in original GGNMOS/GDPMOS protection structure. And it can provide a direct current path under PD/ND mode ESD stress, which is missing in general ESD design for the high-voltage-tolerant I/O pad. It can sustain 2.7A TLP stress according to our simulation result. This protection structure can also be used for high voltage and high power open drain driver and the negative-voltage-tolerant I/O pad.
Keywords
MOS integrated circuits; electrostatic discharge; high-voltage techniques; ESD protection structure; high power open drain driver; high-voltage-tolerant I/O pad; Driver circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems (ICCCAS), 2010 International Conference on
Conference_Location
Chengdu
Print_ISBN
978-1-4244-8224-5
Type
conf
DOI
10.1109/ICCCAS.2010.5581922
Filename
5581922
Link To Document