DocumentCode :
2268481
Title :
A system level HW/SW partitioning and optimization tool
Author :
Schwiegershausen, M. ; Kropp, H. ; Pirsch, P.
Author_Institution :
Lab. fur Informationstech., Hannover Univ., Germany
fYear :
1996
fDate :
16-20 Sep 1996
Firstpage :
120
Lastpage :
125
Abstract :
This paper presents a system level HW/SW partitioning methodology and its implementation as CAD tool for the optimization of heterogeneous multiprocessor systems. Starting from modelling of the signal processing scheme and of the available processor resources, performance and expense measures are estimated for a finite set of processor modules. Based on these measurements, a numerical optimization can be carried out by using mixed integer linear programming as mathematical framework, leading to a heterogeneous system, which is optimal in terms of area expense and throughput rate
Keywords :
circuit layout CAD; integer programming; linear programming; logic CAD; optimisation; signal processing; systems analysis; CAD tool; area expense; heterogeneous multiprocessor systems; mathematical framework; mixed integer linear programming; numerical optimization; optimization tool; processor resources; signal processing scheme; system level HW/SW partitioning; throughput rate; Application software; Digital signal processing; Finite impulse response filter; Laboratories; Multiprocessing systems; Signal processing; Signal processing algorithms; Software prototyping; Throughput; Virtual prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European
Conference_Location :
Geneva
Print_ISBN :
0-8186-7573-X
Type :
conf
DOI :
10.1109/EURDAC.1996.558193
Filename :
558193
Link To Document :
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