An adaptive voltage scaling buck converter based on improved pulse skip modulation

A novel adaptive voltage scaling (AVS) buck converter based on improved pulse skip modulation (IPSM) is proposed in this paper. Pulse skip modulation is used for AVS converter for the first time. The controller of the buck converter includes a delayline, a slacktime detector, a finite-state machine (FSM) and a hybrid digital pulse width modulator (DPWM) which is used to produce a sequence of pulses whose duty cycle is alterable and frequency is fixed according to the input. Compared to AVS buck converter based on pulse width modulation (PWM), AVS buck converter based on IPSM is more efficient under light loads. Meanwhile, the structure of the controller of the proposed AVS buck converter is simple and can be realized by digital design methodology and process, which make the controller easy to be integrated into SoC. The converter is designed in 0.13 μM CMOS process, operating typically at 1.5 MHz. The simulation results show that the output voltage of the converter is adjusted ranged from 0.7 V to 1.5 V to the varied frequency ranged from 25 MHz to 100 MHz of the digital load circuit, which can save the power consumption effectively. The ripple of the output voltage of the buck converter is only 7-24 mV. The layout size of the controller is only 69 μm × 165 μm which is very small.