DocumentCode :
2268992
Title :
Cell loss analysis of per-VC queueing ATM switches
Author :
Zhou, Peifang ; Yang, Oliver W W
Author_Institution :
Sch. of Inf. Technol. & Eng., Ottawa Univ., Ont., Canada
Volume :
1
fYear :
1998
fDate :
24-28 May 1998
Firstpage :
245
Abstract :
Conventional ATM switches are usually port-oriented and they are designed to operate in the context of FIFO queueing. New ATM switches that are currently being developed will be traffic oriented. They will provide per-VC queueing and therefore they handle each traffic flow or connection separately. This paper presents the cell loss evaluation on a per-VC queueing architecture proposed by the authors
Keywords :
asynchronous transfer mode; buffer storage; probability; queueing theory; telecommunication traffic; FIFO queueing; bursty traffic; cell loss analysis; cell loss probability; minimum buffer size; per-VC queueing ATM switches; per-VC queueing architecture; port-oriented switches; traffic oriented switches; uniform traffic; Asynchronous transfer mode; Design engineering; Head; Information technology; Queueing analysis; Read-write memory; Switches; Telecommunication traffic; Traffic control; Virtual colonoscopy;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Computer Engineering, 1998. IEEE Canadian Conference on
Conference_Location :
Waterloo, Ont.
ISSN :
0840-7789
Print_ISBN :
0-7803-4314-X
Type :
conf
DOI :
10.1109/CCECE.1998.682728
Filename :
682728
Link To Document :
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