DocumentCode :
2269035
Title :
Automatic proximity correction for 0.35 μm I-line photolithography
Author :
Garofalo, J. ; Low, K.K. ; Otto, O. ; Pierrat, C. ; Vasudev, P.K. ; Yuan, C.
Author_Institution :
AT&T Bell Labs., Murray Hill, NJ, USA
fYear :
1994
fDate :
5-6 Jun 1994
Firstpage :
92
Lastpage :
94
Abstract :
Recent advances in lithography enhancement techniques such as phase shifting masks (PSM´s) and off-axis illumination have raised the possibility of using I-line photolithography for 0.35μm generation ICs. It has become clear that in order to achieve the necessary line-width control, optical proximity effects must be taken into account in conjunction with these techniques. In this paper, we describe an automatic approach to optical proximity correction (OPC) that is both effective and fast. The work presented is a joint effort between SEMATECH, AT&T, and Trans Vector Technologies. To our knowledge, this is the first practical approach that can perform viable OPC on a real chip layout
Keywords :
circuit layout CAD; integrated circuit layout; integrated circuit technology; phase shifting masks; photolithography; proximity effect (lithography); 0.35 micron; I-line photolithography; OPC; automatic proximity correction; chip layout; line-width control; lithography enhancement techniques; off-axis illumination; optical proximity effects; phase shifting masks; Circuits; Etching; Focusing; Lenses; Lighting; Lithography; Proximity effect; Software performance; Test pattern generators; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Numerical Modeling of Processes and Devices for Integrated Circuits, 1994. NUPAD V., International Workshop on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-1867-6
Type :
conf
DOI :
10.1109/NUPAD.1994.343483
Filename :
343483
Link To Document :
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