Title :
A novel design of compact reversible SG gate and its applications
Author :
Garg, Parul ; Saini, Shrikant
Author_Institution :
Electron. & Commun. Dept., LNM Inst. of Eng. & Technol., Jaipur, India
Abstract :
Reversible logic has received great importance in the recent years because of its in-cogitative feature of reduction in power dissipation which is the key requirement in low power digital designs. It has wide applications in advanced computing, low power CMOS design, optical information processing, DNA computing, bio information, quantum computing and nanotechnology. In this paper a new reversible gate is proposed called SG gate. The encoding and decoding logic has been explained with the help of an algorithm and example. This paper proposes a full adder, N bit adder and a N*N bit reversible multiplier using SG gate. The partial products can be generated with the help of a AND gate. A 4 bit architecture of the proposed reversible adder and multiplier is also designed. Thus, this paper provides the initial threshold to building of more complex system which can execute more complicated operations using reversible logic.
Keywords :
CMOS integrated circuits; adders; biocomputing; decoding; encoding; logic gates; low-power electronics; multiplying circuits; quantum computing; AND gate; DNA computing; N bit adder; N*N bit reversible multiplier; advanced computing; bio information; compact reversible SG gate; decoding logic; encoding logic; full adder; low power CMOS design; low power digital designs; nanotechnology; optical information processing; power dissipation; quantum computing; reversible logic; word length 4 bit; Adders; CMOS integrated circuits; Computer architecture; Decoding; Encoding; Logic gates; Quantum computing; Adder; Multiplier; Reversible Gates; SGG;
Conference_Titel :
Communications and Information Technologies (ISCIT), 2014 14th International Symposium on
Conference_Location :
Incheon
DOI :
10.1109/ISCIT.2014.7011941