DocumentCode :
226919
Title :
A reconfigurable Digital Down Converter architecture for multistandard GNSS receiver
Author :
Thabet, Jihen ; Barrak, Rim ; Kamoun, Najeh ; Khouja, Nadia ; Ghazel, Adel
Author_Institution :
GRESCOM Res. Lab., Univ. of Carthage, Ariana, Tunisia
fYear :
2014
fDate :
24-26 Sept. 2014
Firstpage :
404
Lastpage :
408
Abstract :
This paper presents the design of a reconfigurable Digital Down Converter (DDC) for a quad standard GNSS receiver. By considering GPS, GALILEO, GLONASS and BEIDOU standard specifications, a bandpass RF sampling-based GNSS receiver is designed. After direct digitization of input signals by choosing properly the sampling frequency, an eight-path reconfigurable DDC is proposed before Digital Signal Processing (DSP) stage in order to down-convert GNSS signals to baseband, reduce sampling rates and therefore relax the processing complexity. The trends related to the implementation of a reconfigurable Direct Digital Synthesizer (DDS) as the critical component in the DDC are also addressed. The DDS implementation results show both low complexity and high performance.
Keywords :
frequency convertors; radio receivers; satellite navigation; DSP stage; GPS; bandpass RF sampling; digital signal processing stage; direct digital synthesizer; global positioning system; multistandard GNSS receiver; navigation satellite systems; reconfigurable DDC; reconfigurable DDS; reconfigurable digital down converter architecture; Band-pass filters; Digital signal processing; Field programmable gate arrays; Global Positioning System; Low earth orbit satellites; Radio frequency; Standards; CORDIC; DDC; FPGA; GNSS signals; bandpass RF sampling; decimation filters; multistandard radio receiver;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Information Technologies (ISCIT), 2014 14th International Symposium on
Conference_Location :
Incheon
Type :
conf
DOI :
10.1109/ISCIT.2014.7011942
Filename :
7011942
Link To Document :
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