A transformer protection technique with immunity to CT saturation and ratio-mismatch conditions

Author

Sidhu, T.S. ; Gill, H.S. ; Sachdev, M.S.

Author_Institution

Power Syst. Res. Group, Saskatchewan Univ., Saskatoon, Sask., Canada

Volume

1

fYear

1998

fDate

24-28 May 1998

Firstpage

285

Abstract

This paper describes a digital technique for protecting power transformers. The technique uses positive- and negative-sequence models of the power system in a fault-detection algorithm. The phase voltages and currents at the transformer terminals are used to detect faults. The performance of the proposed technique was studied for a variety of operating conditions using simulated data. The impact of ratio-mismatch and saturation of CTs on the performance of the technique was also examined

Keywords

current transformers; fault location; microcomputer applications; power engineering computing; power transformer protection; relay protection; CT saturation immunity; differential protection; fault detection; fault-detection algorithm; microprocessor based relays; negative-sequence models; operating conditions; phase currents; phase voltages; positive-sequence models; ratio-mismatch conditions; transformer protection technique; transformer terminals; Circuit faults; Electrical fault detection; Fault currents; Fault detection; Phase detection; Power system faults; Power system modeling; Power system protection; Power system simulation; Power transformers;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical and Computer Engineering, 1998. IEEE Canadian Conference on

Conference_Location

Waterloo, Ont.

ISSN

0840-7789

Print_ISBN

0-7803-4314-X

Type

conf

DOI

10.1109/CCECE.1998.682740

Filename

682740