Title :
A 1 Gbin/s CABAC encoder for H.264/AVC
Author :
Wei Fei ; Dajiang Zhou ; Goto, Satoshi
Author_Institution :
Grad. Sch. of Inf., Production & Syst. LSI, Waseda Univ., Kitakyushu, Japan
fDate :
Aug. 29 2011-Sept. 2 2011
Abstract :
In this paper, we propose a 1 Gbin/s context-based adaptive binary arithmetic coding (CABAC) encoder architecture for beyond-HDTV applications. CABAC is a crucial part in H.264/AVC main and high profiles that provides a great compression ratio at the expense of high computational complexity. And it is also considered as a very efficient coding method in the developing high-efficiency video coding (HEVC) standard. We try to accelerate the CABAC encoder to provide a high throughput to meet the requirement of beyond-HDTV video. Our design includes the binarization, context modeling and binary arithmetic encoding (BAE) parts and achieves a throughput of 4 bins per cycle. The synthesis result using SMIC 90nm shows that the logic gate count is 36.2K in all and the encoder engine can work at a maximum frequency of 279MHz. Thus the overall throughput can reach over 1 Gbin/s. In our design, the 460 contexts are assigned to 6 SRAMs to attain efficient context modeling. And the binarization part is also optimized to enhance the throughput with low hardware cost.
Keywords :
SRAM chips; adaptive codes; arithmetic codes; binary codes; data compression; high definition television; video codecs; video coding; CABAC encoder; H.264/AVC; HDTV video; HEVC standard; SMIC; SRAM; binary arithmetic encoding; compression ratio; context-based adaptive binary arithmetic coding; frequency 279 MHz; high-efficiency video coding; size 90 nm; Context; Context modeling; Encoding; Pipelines; Random access memory; Throughput; Video coding;
Conference_Titel :
Signal Processing Conference, 2011 19th European
Conference_Location :
Barcelona